Physical Design Engineer Resume

Louis Doyle

4540 Hilltop Haven Drive

Newark, NJ 7102

(555)-555-5555

[email]

Job Objective Seeking a position as a Physical Design Engineer with an opportunity for advancement.

Summary of Qualifications:

• Huge experience in digital and analog CMOS circuit design
• Deep knowledge of semiconductor device physics and the CMOS process flow
• Familiarity with Unix, C and/or C++, Perl, TCL and RF and mixed-signal IC designs
• Ability to calculate layout parasitics and reliability constraints
• Familiarity with CMOS design rule requirements and process layers for typical CMOS process
• Outstanding knowledge of electro-migration techniques

Work Experience:

Physical Design Engineer, August 2005 – Present

Intel, Newark, NJ

• Prepared chip designs and custom layout floor plans for process.
• Performed and debugged verification of schematic layout.
• Developed complex layouts and prepared project milestones and ensured its delivery on time.
• Determined guidelines and methodologies on advanced CMOS process and required circuits.
• Coordinated with Design Automation units and design engineers, analyzed processes and implemented necessary changes.
• Maintained layout automation features and recommended changes for improvement in quality.

Education

Bachelor’s Degree in Computer Science, Hondros College, Westerville, OH

Example #2

Objective To obtain a position as a Physical Design Engineer which emphasizes growth, creativity, and analytical thinking.

Skills:

• Wide experience in ASIC design flow and methodologies.
• Excellent knowledge in digital circuit design, physical design, timing analysis, artwork verification and layout skills.
• Broad experience in floor plan, routing, CTS, LVS design flow and timing driven design flow.
• Through knowledge of electronics, drafting, and IC design rules.

Professional Experience:

• Physical Design Engineer, 2006 to till date
• Xfone USA, Inc., AR

• Performed circuit synthesis, physical synthesis, static timing analysis, chip floor planning, auto place and route, and design rule checking.
• Managed the board development activities and interacted with the system architecture group and ASIC team.
• Designed layout for circuits, according to engineering specifications, used computer-assisted design equipment and software.
• Executed and completed portions of the GPU and SOC physical design.

Education

M.S in Electronics Engineering, 2006

University of Michigan, Ann Arbor

B.S in Electronics Engineering, 2004

University of Texas at Austin